RISC-V Summit Europe 2026

The RISC-V Summit Europe 2026 will take place from June 8–12, 2026 at BolognaFiere, Bologna, Italy. It is the premier European event for the open-standard RISC-V instruction set architecture (ISA), bringing together industry leaders, researchers, government representatives, and academia.

• Program Structure:
• June 8: Technical Working Group (TWG) meetings and tutorials (free of charge).
• June 9–11: Core Summit with keynotes, panels, industrial exhibition, demos, posters, and networking.
• June 12: Side events and community activities.
• Speakers & Keynotes: Krste Asanović (SiFive Chief Architect), Luca Benini (ETH Zurich & University of Bologna), Tanya Dadasheva (Ainekko), Andrew Dellow (Qualcomm), Greg Kroah-Hartman (Linux Foundation), and many others.
• Focus Topics: Security extensions, matrix extensions for AI, open hardware ecosystems, energy-efficient chip design, and Europe’s digital sovereignty.
• Registration Fees:
• Industry & Academia: €600 (early), €670 (regular), €750 (late).
• PhD/PostDocs: €510–640 depending on registration period.
• MSc & Low/Middle Income Countries: €300–380.